AVR / FPGA 應用整合邏輯1

 

 

使用AVR或其他Embedded Processor與FPGA或ASIC整合, 有幾種Interface Style :

 

  • n 以Processor Chip的I/O Port直接控制FPGA或ASIC

 

這個方法的優點是簡單, 缺點是可以控制的項目會受限於Processor Chip的I/O Port數目

 

 

 

  • n 以Processor Chip的External Memory Bus以Memory Map I/O的型態,控制FPGA或ASIC

 

另一方面, 這個方法的其他優點是可以幾乎無限的擴充, 所需要的Control I/O, 而且只需要花費一些Decode與Latch的電路

 

 

 

 

 

 

Source

 

1. 先建立AVR的Program Code, 可以選擇使用Assembly(從步驟開始)或C語言(從步驟開始)

 

2. 執行AVR Studio4

 

3. 輸入acpucnt.asm code如下 :

 

acpucnt.asm

 

    .include "8515def.inc"

    .org $0

    rjmp rstrout

    .org $10

rstrout:

    ldi    r16,LOW(RAMEND)

    out  SPL,r16

    ldi    r16,HIGH(RAMEND)

    out  SPL+1,r16                        ; Set Stack Pointer SP(SPH,SPL)

    ldi    r16,$ff

    out  DDRA,r16                   ; Set Port A Direction as Output

    ldi    r16,$00

L0:       ldi    r18,$01

    rcall delayA

    out  PORTA,r16

    inc   r16                                ; Port A as a counter

    rjmp L0

 

delayA:                               ; Delay Subroutine

    push       r16

    push       r17

dly0:    ldi          r17,$00

dly1:    ldi          r16,$00

dla2:    dec        r16

    brne dla2

    dec        r17

    brne dly1

    dec        r18

    brne dly0

    pop        r17

    pop        r16

    ret

 

 

4. 執行Code Vision C Compiler

 

5. 修改source code如下 (增加斜線粗體的部分)

 

AVR C Code: ccpucnt.c

/*********************************************

This program was produced by the

CodeWizardAVR V1.23.8c Evaluation

Automatic Program Generator

?Copyright 1998-2003 HP InfoTech s.r.l.

http://www.hpinfotech.ro

e-mail:office@hpinfotech.ro

 

Project :

Version :

Date    : 2003/4/22

Author  : Freeware, for non-commercial use only

Company :

Comments:

 

 

Chip type           : AT90S8515

Clock frequency     : 8.000000 MHz

Memory model        : Small

External SRAM size  : 0

Data Stack size     : 128

*********************************************/

 

#include <90s8515.h>

#include <delay.h>

 

// Declare your global variables here

 

void main(void)

{

// Declare your local variables here

unsigned char aa;

// Input/Output Ports initialization

// Port A initialization

// Func0=Out Func1=Out Func2=Out Func3=Out Func4=Out Func5=Out Func6=Out Func7=Out

// State0=0 State1=0 State2=0 State3=0 State4=0 State5=0 State6=0 State7=0

PORTA=0x00;

DDRA=0xFF;

 

// Port B initialization

// Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In

// State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T

PORTB=0x00;

DDRB=0x00;

 

// Port C initialization

// Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In

// State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T

PORTC=0x00;

DDRC=0x00;

 

// Port D initialization

// Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In

// State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T

PORTD=0x00;

DDRD=0x00;

 

// Timer/Counter 0 initialization

// Clock source: System Clock

// Clock value: Timer 0 Stopped

TCCR0=0x00;

TCNT0=0x00;

 

// Timer/Counter 1 initialization

// Clock source: System Clock

// Clock value: Timer 1 Stopped

// Mode: Normal top=FFFFh

// OC1A output: Discon.

// OC1B output: Discon.

// Noise Canceler: Off

// Input Capture on Falling Edge

TCCR1A=0x00;

TCCR1B=0x00;

TCNT1H=0x00;

TCNT1L=0x00;

OCR1AH=0x00;

OCR1AL=0x00;

OCR1BH=0x00;

OCR1BL=0x00;

 

// External Interrupt(s) initialization

// INT0: Off

// INT1: Off

GIMSK=0x00;

MCUCR=0x00;

 

// Timer(s)/Counter(s) Interrupt(s) initialization

TIMSK=0x00;

 

// Analog Comparator initialization

// Analog Comparator: Off

// Analog Comparator Input Capture by Timer/Counter 1: Off

// Analog Comparator Output: Off

ACSR=0x80;

aa=0;

while (1)

      {

      // Place your code here

      PORTA=a++;

      delay_ms(200);

      };

}

 

亦可以簡化如下:

 

AVR C Code: ccpucnt.c

 

#include <90s8515.h>

#include <delay.h>

 

void main(void)

{

unsigned char aa;

DDRA=0xFF;

aa=0;

while (1)

      {

      PORTA=a++;

      delay_ms(200);

      };

}

 

 

6. 儲存檔案

 

7. 再建立FPGA的Project-gcpucnt

 

VHDL : gcpucnt.vhd

Verilog : gcpucnt.v

 

LIBRARY ieee;

USE ieee.std_logic_1164.all;

USE ieee.std_logic_unsigned.all;

ENTITY gcpucnt IS

PORT

(

      pa     : IN STD_LOGIC_VECTOR(7 DOWNTO 0);

      led    : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)

);

END gcpucnt;

ARCHITECTURE a1 OF gcpucnt IS

BEGIN

led<=pa;

END a1;

 

 

module gcpucnt

(

     pa,led

);

input[7:0] pa;

output[7:0] led;

 

assign led=pa;

 

endmodule

 

 

 

 

 

 

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