FPGA / ARM / DSP Wishbone SoC
< Using DSP >
FPGA / ARM / DSP Wishbone SoC 整合實驗2
Lab2 : Lab 8x8 Image DCT/QNT/IDCT
▋ Design Codes
xbus.h / xbus.c / fbgfx.h / fbgfx.c 【 code內容和Lab.1共用 】
imgdct.c
#define CHIP_6204
#include <stdio.h>
#include <stdlib.h>
#include "IMG_idct_8x8.h"
#include "csl.h"
#include "csl_dat.h"
#include "xbus.h"
extern unsigned char *fbBase;
#include "fbgfx.h"
unsigned char pica[]=
#include "xpic0.h"
unsigned char picb[]=
#include "nnn014.h"
unsigned char dpic[480*272];
unsigned char bblk[256][8];
unsigned char dbblk[256][8];
short sblk[256][8];
short recip_tbl[] =
{
0x1000, 0x1746, 0x1555, 0x1249, 0x1555, 0x199a, 0x1000, 0x1249,
0x13b1, 0x1249, 0x0e39, 0x0f0f, 0x1000, 0x0d79, 0x0aab, 0x0666,
0x09d9, 0x0aab, 0x0ba3, 0x0ba3, 0x0aab, 0x0539, 0x0750, 0x06eb,
0x08d4, 0x0666, 0x046a, 0x0505, 0x0432, 0x0444, 0x047e, 0x0505,
0x0492, 0x04a8, 0x0400, 0x038e, 0x02c8, 0x0348, 0x0400, 0x03c4,
0x02f1, 0x03b6, 0x04a8, 0x0492, 0x0333, 0x0259, 0x0329, 0x02f1,
0x02b2, 0x029d, 0x027c, 0x0276, 0x027c, 0x0421, 0x0353, 0x0244,
0x021e, 0x0249, 0x028f, 0x0222, 0x02c8, 0x0289, 0x027c, 0x0296
};
short recip_tbla[64] =
{
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000,
0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000
};
#pragma DATA_SECTION(recip_tbl,".imgbuf");
#pragma DATA_SECTION(recip_tbla,".imgbuf");
#pragma DATA_SECTION(bblk,".imgbuf");
#pragma DATA_SECTION(dbblk,".imgbuf");
#pragma DATA_SECTION(sblk,".imgbuf");
#pragma DATA_SECTION(pica,".imgbulk");
#pragma DATA_SECTION(picb,".imgbulk");
#pragma DATA_SECTION(dpic,".imgbulk");
#pragma DATA_ALIGN(pica, 4);
#pragma DATA_ALIGN(picb, 4);
#pragma DATA_ALIGN(bblk, 4);
#pragma DATA_ALIGN(dbblk, 4);
#pragma DATA_ALIGN(sblk, 4);
#pragma DATA_ALIGN(dpic, 4);
#pragma DATA_ALIGN(recip_tbl, 4);
#pragma DATA_ALIGN(dpic, 4);
int test = 0;
unsigned int cid=0;
void dctidct(unsigned char* pic,unsigned char mode)
{
int x;
cid=DAT_copy2d(DAT_2D1D,&pic[0],&bblk[0][0],8,256,256);
DAT_wait(cid);
// kernel loop
for(x=0;x<256;x+=8)
{
IMG_pix_expand(256*8,&bblk[0][0],&sblk[0][0]);
IMG_fdct_8x8(&sblk[0][0],256*8/64);
DAT_wait(cid); // wait for result data DMA
cid=DAT_copy2d(DAT_2D1D,&pic[x+8],&bblk[0][0],8,256,256);
IMG_quantize(&sblk[0][0],256*8/64,64,(const short*)recip_tbla,12);
if(mode==1) IMG_idct_8x8(&sblk[0][0],256*8/64);
IMG_pix_sat(256*8,&sblk[0][0],&dbblk[0][0]);
DAT_wait(cid);
cid=DAT_copy2d(DAT_1D2D,&dbblk[0][0],&dpic[x],8,256,480);
}
//epilog
DAT_wait(cid);
}
void setqtab(int n)
{
int i;
for(i=0;i<64;i++) recip_tbla[i]=(i<=n)?0x1000:0;
}
void setqtabz(int n)
{
int i,j;
for(j=0;j<8;j++) for(i=0;i<8;i++) recip_tbla[i+j*8]=((i+j)<=n)?0x1000:0;
}
void showparam()
{
int i,j; char str[16];
for(j=0;j<8;j++)
for(i=0;i<8;i++)
{
sputx(recip_tbla[i+j*8]>>8,str,2);
putstr(256+16+i*3*8,16+j*8, str,0xff,0x00);
}
}
void showdct(unsigned char* pic,int n,int dly,int sty,int seq,int spm)
{
int i,j; char str[16];
for(j=0;j<n;j++)
{
for(i=0;i<(seq?15:64);i++)
{
seq?setqtabz(i):setqtab(i);
dctidct(pic,1);
if(spm)
{
sputx(i,str,2);
putstr(256+16,0, str,0xff,0x00);
showparam();
}
imshowx((int)&dpic[0],0,0x20000);
if(dly>0) delayms(dly);
}
delayms(sty);
}
}
int main()
{
CSL_init();
fbBase=dpic;
clear(0);
DAT_open(DAT_CHA0,DAT_PRI_HIGH,DAT_OPEN_2D);
while(1)
{
initvga(0);
showdct(pica,1,0x1600,0x8000,0,1);
showdct(picb,1,0x1600,0x8000,0,1);
initvga(1);
showdct(pica,1,0x1600,0x8000,0,1);
showdct(picb,1,0x1600,0x8000,0,1);
initvga(0);
showdct(pica,1,0x1600,0x8000,1,1);
showdct(picb,1,0x1600,0x8000,1,1);
initvga(1);
showdct(pica,1,0x1600,0x8000,1,1);
showdct(picb,1,0x1600,0x8000,1,1);
initvga(0);
showdct(pica,1,0x800,0x8000,1,1);
showdct(picb,1,0x800,0x8000,1,1);
initvga(1);
showdct(pica,1,0x800,0x8000,1,1);
showdct(picb,1,0x800,0x8000,1,1);
initvga(0);
showdct(pica,1,0x200,0x8000,1,1);
showdct(picb,1,0x200,0x8000,1,1);
initvga(1);
showdct(pica,1,0x200,0x8000,1,1);
showdct(picb,1,0x200,0x8000,1,1);
initvga(0);
showdct(pica,3,0x80,0x8000,1,1);
showdct(picb,3,0x80,0x8000,1,1);
initvga(1);
showdct(pica,3,0x80,0x8000,1,1);
showdct(picb,3,0x80,0x8000,1,1);
initvga(0);
showdct(pica,4,0,0x8000,1,1);
showdct(picb,4,0,0x8000,1,1);
initvga(1);
showdct(pica,4,0,0x8000,1,1);
showdct(picb,4,0,0x8000,1,1);
initvga(0);
showdct(pica,4,0,0x8000,1,0);
showdct(picb,4,0,0x8000,1,0);
initvga(1);
showdct(pica,4,0,0x8000,1,0);
showdct(picb,4,0,0x8000,1,0);
}
DAT_close();
}
